Data converters, both digital-to-analog converters (DAC) and analog-to-digital converters (ADC), are ubiquitous in applications involving digital signal processing of real-world signals such as those found in communication systems, instrumentation, and audio and video processing systems.
Two major issues for DAC design are monotonicity and resolution. Monotonicity means that as the digital value becomes greater, the converted analog value must also become greater. Many DAC building blocks require guaranteed monotonicity with moderate clock rate and moderate design complexity. Examples include a DAC in a digitally controlled oscillator within the PLL loop, or a DAC in a digitally controlled crystal oscillator in an automatic frequency control loop. Matching between different DAC elements is usually required to guarantee monotonic behavior. With the process scaling, the physical size of the DAC elements becomes smaller, and it is therefore more difficult to control the size of the DAC elements, which must be matched to achieve monotonicity. As a result, the physical size of the DAC elements is limited by the matching requirement, thus the DAC does not benefit from the process scaling.
One type of DAC that has guaranteed monotonicity is a thermometer DAC. It is so named because it is similar to a mercury thermometer, where the mercury column always rises to the appropriate temperature and no mercury is present above that temperature. Typically, the input digital signal is binary and the binary code is converted to a thermometer code. The thermometer code is then used to control thermometer elements to generate an analog signal. For a thermometer DAC, elements are all of the same size, so that element matching becomes much simpler than in the binary case. Considering the transfer function, the thermometer converter is monotonic by design, since, when the input value increases, the bits change from 0 to 1 only. The requirement on element matching is also relaxed in the thermometer DAC and monotonicity is guaranteed.
Although the thermometer DAC has guaranteed monotonicity, the maximum resolution n of a thermometer DAC is limited by the capability to implement (2n−1) identical unit devices. Published works show that even with modern technologies, it is very difficult to achieve resolutions higher than 12 bits due to the large amount of thermometer elements and the associated controlled signals. Unfortunately, this resolution is still too low for many applications.
Various methods have been designed to achieve higher resolutions. Each, however, has its limitations. For example, a Nyquist rate DAC has higher design and element matching complexity. A sigma delta DAC requires a much faster clock frequency for over sampling and quantization noise shaping. This element also requires analog filtering.
Typically, to achieve higher resolution, a hybrid scheme of hybrid Nyquist thermometer and sigma delta DAC is used. The resolution can be extended beyond the capability of the thermometer DAC. FIG. 1 illustrates a conventional hybrid Nyquist thermometer and sigma delta DAC. Node 16 outputs analog signals. Input node 2 receives digital input signals with bits. If n bits are all implemented by the thermometer DAC, the generated thermometer code has (2n−1) bits so that (2n−1) elements are required. In the hybrid scheme, the bits are divided into m most significant bits (MSB) named 4n−m through 4n and (n−m) least significant bits (LSB) named 40 through 4n−m−1. The m most significant bits 4n−m through 4n are converted to thermometer code by a thermometer decoder 6. The thermometer code is used to control an element array 10 to generate an analog signal.
It is noticed that the value represented by the (n−m) LSB is always smaller than the value represented by the last bit of the MSB, or the bit 4n−m. Therefore, the value represented by the (n−m) least significant bits can be calculated as a fraction of the “whole” value of an element. The fractional value is typically converted to the analog signal by dithering a fixed and pre-determined thermometer element 14 that is substantially identical to other elements. Dithering the element 14 to a fractional value C means that when converting a fraction value, the element is turned on C of the time, and off (1−C) of the time, therefore, the analog output can have a value that is only a fraction of the “whole” value of an element.
The advantage of the hybrid DAC can be explained using an example. Assume a DAC with 14 bits resolution is desired. Since the 14 bits thermometer DAC requires 214−1, or 16,383 elements, it is difficult to implement the DAC as a thermometer DAC. However, it is common to implement a 10 bits thermometer DAC. Therefore, the 14 bits digital signal can be divided as 10 bits MSB and 4 bits LSB. The smallest value represented by the MSB is 16, or binary 10000, while the greatest value represented by the 4 bits LSB is 15, or binary 1111. Therefore, the LSB always represents a fractional value of the MSB. For example, 00,0000,0001,0011 can be represented as 00,0000,0001+ 3/16. Converting such a digital signal to analog means turning on one thermometer element and dithering another element 3/16 of the time. With the hybrid scheme, only 210, or 1024 thermometer elements are required. Therefore, the production cost is lowered and design is less complex.
Typically, dithering is performed on one dedicated element 14, as illustrated in FIG. 1. This requires element 14 to have very good matching with the other elements 101 through 102^m−1 in the DAC to guarantee monotonicity. However, the fractional value of the dithered element may not be smaller than the “whole” value of the thermometer DAC element, thus creating a non-monotonic DAC transfer function. In order to guarantee monotonicity, the matching between this dithered element and the rest of the DAC element needs to be so good that under all thinkable process, voltage, and temperature conditions, non-monotonicity will not occur. This matching requirement demands a certain physical size of DAC elements and prevents the DAC from having the benefit of process scaling.